Ofertes d'ocupació per a Perl

• Nivell d'experiència---
• Tipus de contracteA temps complert
• Publicada28 de des.

. API Python Kubernetes Bash Perl Go Terraform Office

Join a team of cybersecurity professionals and help Swiss Re to fulfil its mission in making the world more resilient. As a Security Engineer, you’ll be responsible for deploying and operating our data scanning/data discovery solution (BigID) in Kubernetes environments, creating CI/CD pipelines, building API automations and integrating data security solutions with our IT landscape. You’ll work in a hybrid setup, perfectly balancing work from home and the office premises.

About The Team

The Data Loss Prevention (DLP) engineering team is responsible for protecting Swiss Re’s sensitive data through the development and implementation of processes, tools and strategies that prevent data leakage and misuse.

We are enhancing our capabilities in data discovery, classification and policy enforcement. These improvements enable us to identify sensitive data across the enterprise, automate protection measures and integrate insights into our security operations to better safeguard information and meet regulatory requirements.

We're looking for a skilled Security Engineer who will take on the incentive of implementing the best solution and guiding the development of these engineering services along with a dedicated team of experts.  

In your role, you will…

• Deploy, operate and optimise data scanning/data discovery solutions (BigID) in Kubernetes environments
• Design and build CI/CD pipelines for security solutions
• Develop and maintain API automations to streamline security processes
• Integrate data security solutions with the broader IT landscape
• Improve metrics and monitoring to ensure the reliability of our security infrastructure
• Utilise existing documentation, source code and logs to understand complex interactions between systems
• Provide security guidance on new products and technologies
• Communicate and collaborate effectively with stakeholders
  
  

Your Qualifications

• Significant knowledge of major cybersecurity concepts, technologies and standard methods, with a willingness to dive into new areas
• Can-do attitude with a proactive approach toward challenges, producing tangible results
• Deep expertise with several of the following areas:
• Kubernetes environments and container security
• CI/CD pipeline design and implementation
• API development and automation
• Network security, application security and identity management
• Experience in automation, coding and/or scripting, using one or more of the following languages: Bash, Golang, Python, Perl, Terraform or similar
• Knowledge in data security and data discovery solutions (BigID or similar) is favourable
• Excellent communication skills – fluency in English, both spoken and written
• Familiarity with the implications of security standards in regulated environments
  
  

Role

For Spain the base salary range for this position is between EUR 42,000 and EUR 70,000 (for a full-time role). The specific salary offered considers:

• the requirements, scope, complexity and responsibilities of the role,
• the applicant’s own profile including education/qualifications, expertise, specialisation, skills and experience.
  
  

In the situation where you do not meet all the requirements or you significantly exceed these, the offered salary may be below or above the advertised range.

In addition to your base salary, you may be eligible for additional rewards and benefits including an attractive performance-based bonus.

We provide feedback to all candidates, in case you have not heard from us, please, check your spam folder.

About Swiss Re

Swiss Re is one of the world’s leading providers of reinsurance, insurance and other forms of insurance-based risk transfer, working to make the world more resilient. We anticipate and manage a wide variety of risks, from natural catastrophes and climate change to cybercrime. Combining experience with creative thinking and cutting-edge expertise, we create new opportunities and solutions for our clients. This is possible thanks to the collaboration of more than 14,000 employees across the world.

Our success depends on our ability to build an inclusive culture encouraging fresh perspectives and innovative thinking. We embrace a workplace where everyone has equal opportunities to thrive and develop professionally regardless of their age, gender, race, ethnicity, gender identity and/or expression, sexual orientation, physical or mental ability, skillset, thought or other characteristics. In our inclusive and flexible environment everyone can bring their authentic selves to work and their passion for sustainability.

If you are an experienced professional returning to the workforce after a career break, we encourage you to apply for open positions that match your skills and experience.

Keywords

Reference Code: 135857

• Nivell d'experiència---
• Tipus de contracteA temps complert
• Publicada27 de des.

. Python Agile Perl

Overview

Almirall is seeking a young scientist to work as an intern for the Computer-Aided Drug Design section of the R+D Data Science Dpt. with the mission of contributing to the design of NCEs to accelerate a series of discovery programs

Job Responsibilities

• Participate in a variety of in silico tasks related to Almirall’s drug discovery projects
• Learn and apply different molecular modeling tools, both structure-based and ligand-based
• Participate in the development and testing of innovative in silico platforms, some based on artificial intelligence
  
  

Job Requirements

• Completed BSc in Health Sciences, desirably Pharmacy, Chemistry or Biochemistry, ideally finishing a Master’s degree
• Some programming/scripting background (python, perl,….)
• Some background in Computational Chemistry, Molecular Biology, Pharmacology.
• Willingness to learn and to contribute to impact a variety of projects
• Proficiency in English, spoken and written, is a must
• Availability to live in the Barcelona area and to work on-site (Sant Feliu de Llobregat)
  
  

What We Offer

• Collaborating in an international environment with plenty of opportunities to learn
• Contract duration: 12 months
• Full-time contract (35 hours per week)
  
  

Why work with Almirall?

We are a people-centric company where employees are at their best, patients and customer are at the heart of every decision, and our focus and agility allow us to deliver greater impact for all.

Additionally, for the 17th year in a row, we have been certified as Top Employer Spain, and also Top Employer Germany for the first time.

This strengthens our commitment to create a unique work environment that helps our employees to develop their skills to fullest and grow both professionally and as individuals.

We are delighted to have a great team that is proactive, innovative, and eager to transform the world of people with skin conditions.

We are proud of each one of our employees, their development, and growth: they are the success of the company.

Our purpose

"Transform the patients' world by helping them realize their hopes & dreams for a healthy life".

Our values

• Care: we listen & empathize, we value diverse perspectives & backgrounds and we help each other succeed.
• Courage: we challenge the status quo, we take full ownership and we learn from our success & failures.
• Innovation: we put the patient and customer at the center, we create novel solutions and we empower entrepreneurial mindsets.
• Simplicity: we act decisively and avoid over-analysis, we understand why before we act and we are agile & keep things simple.
  
  

At Almirall, it’s all about people!

#wearealmirall

• Nivell d'experiència---
• Tipus de contracteA temps complert
• Publicada21 de des.

. Python Perl

Join a thriving environment tasked with delivering new and disruptive technologies!

We are seeking a highly motivated and skilled Digital IC Designer to join our engineering team. The ideal candidate will be responsible for the design, development, simulation, and verification of complex digital integrated circuits (ICs) for various applications. This role requires hands-on experience with the Cadence suite of Electronic Design Automation (EDA) tools to ensure designs meet performance, power, and area specifications.

Key Responsibilities

RTL Design & Development: Develop and implement RTL (Register Transfer Level) code using VHDL/Verilog based on design specifications.

Simulation and Verification:Perform thorough functional verification and simulation of IC designs using Cadence verification tools (e.g., Cadence NC-Launch/Incisive, SimVision) to validate performance and functionality.

Synthesis and Implementation:Work on synthesis and physical design tasks, including floorplanning, placement, clock tree synthesis, and routing using Cadence physical design platforms (e.g., Cadence Genus, Cadence Innovus).

Timing Analysis and Signoff:Conduct static timing analysis (STA) and timing closure using tools like Cadence Tempus to ensure designs meet all timing requirements.

Physical Verification: Perform design rule checks (DRC) and layout versus schematic (LVS) verification using tools such as Cadence Pegasus or Cadence Innovus to prepare designs for fabrication (tape-out).

Collaboration: Collaborate with cross-functional teams, including system architects, analog designers, and layout engineers, to ensure seamless integration and successful product development.

Documentation: Create and maintain comprehensive design documentation, technical reports, and test plans.

Qualifications

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with a focus on VLSI or microelectronics.

Proven experience in digital IC design, with a strong portfolio of completed projects.

Expertise in the Cadence digital design flow is a must, including tools like Virtuoso (for schematics/layout viewing), Genus (synthesis), Innovus(physical design), Tempus (timing analysis), and verification tools.

Familiarity with other industry-standard EDA tools (Synopsys, Mentor Graphics) is a plus.

Proficiency in hardware description languages (Verilog, VHDL).

Strong understanding of semiconductor physics and fabrication processes.

Knowledge of low-power design techniques and methodologies.

Scripting skills (Tcl, Perl, Python) to automate design flows are desirable.

Strong analytical and problem-solving skills, excellent communication, and the ability to work effectively in a team environment.

Nice To Have

Familiarity with other industry-standard EDA tools (e.g., Synopsys, Mentor Graphics).

Experience with low-power design methodologies and advanced optimization techniques.

Strong scripting abilities (Tcl, Perl, Python) to automate design flows and improve efficiency.

Exposure to mixed-signal or analog/digital integration projects.

Knowledge of semiconductor fabrication processes and design for manufacturability (DFM).

Experience working in multicultural, cross-functional engineering teams.

Ability to produce clear technical documentation and communicate complex concepts effectively.

Why Join Us

At The TMRW Foundation SILICON – you will be part of a dynamic and innovative team that is dedicated to building cutting-edge technologies. We offer a collaborative and inclusive work environment where your contributions will make a significant impact.

You can send your CV to ******.

• Nivell d'experiència---
• Tipus de contracteA temps complert
• Publicada21 de des.

. Python Perl

Join a thriving environment tasked with delivering new and disruptive technologies!

We are seeking a highly motivated and skilled Digital IC Designer to join our engineering team. The ideal candidate will be responsible for the design, development, simulation, and verification of complex digital integrated circuits (ICs) for various applications. This role requires hands-on experience with the Cadence suite of Electronic Design Automation (EDA) tools to ensure designs meet performance, power, and area specifications.

Key Responsibilities

RTL Design & Development: Develop and implement RTL (Register Transfer Level) code using VHDL/Verilog based on design specifications.

Simulation and Verification:Perform thorough functional verification and simulation of IC designs using Cadence verification tools (e.g., Cadence NC-Launch/Incisive, SimVision) to validate performance and functionality.

Synthesis and Implementation:Work on synthesis and physical design tasks, including floorplanning, placement, clock tree synthesis, and routing using Cadence physical design platforms (e.g., Cadence Genus, Cadence Innovus).

Timing Analysis and Signoff:Conduct static timing analysis (STA) and timing closure using tools like Cadence Tempus to ensure designs meet all timing requirements.

Physical Verification: Perform design rule checks (DRC) and layout versus schematic (LVS) verification using tools such as Cadence Pegasus or Cadence Innovus to prepare designs for fabrication (tape-out).

Collaboration: Collaborate with cross-functional teams, including system architects, analog designers, and layout engineers, to ensure seamless integration and successful product development.

Documentation: Create and maintain comprehensive design documentation, technical reports, and test plans.

Qualifications

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with a focus on VLSI or microelectronics.

Proven experience in digital IC design, with a strong portfolio of completed projects.

Expertise in the Cadence digital design flow is a must, including tools like Virtuoso (for schematics/layout viewing), Genus (synthesis), Innovus(physical design), Tempus (timing analysis), and verification tools.

Familiarity with other industry-standard EDA tools (Synopsys, Mentor Graphics) is a plus.

Proficiency in hardware description languages (Verilog, VHDL).

Strong understanding of semiconductor physics and fabrication processes.

Knowledge of low-power design techniques and methodologies.

Scripting skills (Tcl, Perl, Python) to automate design flows are desirable.

Strong analytical and problem-solving skills, excellent communication, and the ability to work effectively in a team environment.

Nice To Have

Familiarity with other industry-standard EDA tools (e.g., Synopsys, Mentor Graphics).

Experience with low-power design methodologies and advanced optimization techniques.

Strong scripting abilities (Tcl, Perl, Python) to automate design flows and improve efficiency.

Exposure to mixed-signal or analog/digital integration projects.

Knowledge of semiconductor fabrication processes and design for manufacturability (DFM).

Experience working in multicultural, cross-functional engineering teams.

Ability to produce clear technical documentation and communicate complex concepts effectively.

Why Join Us

At The TMRW Foundation SILICON – you will be part of a dynamic and innovative team that is dedicated to building cutting-edge technologies. We offer a collaborative and inclusive work environment where your contributions will make a significant impact.

You can send your CV to ******.